John M. Boyer, Charles F. Wiecha
DocEng 2009
Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has attracted significant attention because of their inherent parallelism and high performance requirements. Languages, tools, and even custom hardware for streaming have been proposed, some of which are commercially available. There are several significant challenges to realizing streaming applications directly in hardware (FPGAs). Since FPGAs have finite resources, there are often many non-trivial tradeoffs between processing throughput and overall latency. In this paper, we describe an algorithm that computes refinements of stream graphs into designs that optimize processing throughput subject to user-specified area and latency constraints. Copyright 2009 ACM.
John M. Boyer, Charles F. Wiecha
DocEng 2009
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