R.W. Gammon, E. Courtens, et al.
Physical Review B
We have exploited a recently-developed, through-wafer via technology in silicon to implement a novel Faraday cage scheme for substrate crosstalk suppression in system-on-chip (SOC) applications. The Faraday cage structure consists of a ring of grounded vias encircling sensitive or noisy portions of a chip. The via technology features high aspect ratio, through-wafer holes filled with electroplated Cu and lined with a silicon nitride barrier layer. The new Faraday cage structure has shown crosstalk suppression of 40 dB at 1 GHz and 36 dB at 5 GHz at a distance of 100 μm. This is about 10 dB better than any other isolation technique previously reported. © 2001 IEEE.
R.W. Gammon, E. Courtens, et al.
Physical Review B
Frank Stem
C R C Critical Reviews in Solid State Sciences
M. Hargrove, S.W. Crowder, et al.
IEDM 1998
A. Nagarajan, S. Mukherjee, et al.
Journal of Applied Mechanics, Transactions ASME