Junchen Jiang, Yue Zhu
OSSNA 2025
In this paper, we describe application-specific extensions for fuzzy processing to a general purpose processor. The application-specific instruction set extensions were defined and evaluated using hardware/software codesign techniques. Based on this approach, we have extended the MIPS instruction set architecture with only a few new instructions to significantly speed up fuzzy computation with no increase of the processor cycle time and with only minor increase in chip area. The processor is implemented using a reconfigurable processor core which was designed as a starting point for application-specific processor designs to be used in embedded applications. Performance is presented for three representative applications of varying complexity. © 2000 IEEE.
Junchen Jiang, Yue Zhu
OSSNA 2025
Vladimir Yanovski, Israel A. Wagner, et al.
Ann. Math. Artif. Intell.
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IEEE-CEC 2000
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Journal of the ACM