Richard E. Matick, Albert E. Ruehli
IEEE Transactions on CPMT
The parallel-plate formula is widely used by the solid-state circuit designer to estimate capacitances in integrated circuits. Since considerable errors may result from using this approximation, this correspondence gives correction curves for a wide range of parameters. It is shown that the finite conductor thickness may significantly contribute to the increase in capacitance. Copyright 1973 by The Institute of Electrical and Electronics Engineers, Inc.
Richard E. Matick, Albert E. Ruehli
IEEE Transactions on CPMT
Albert E. Ruehli
IEEE T-MTT
Albert E. Ruehli, Giulio Antonini
EMC 2003
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IEEE Topical Meeting EPEPS 2007