Donald Samuels, Ian Stobert
SPIE Photomask Technology + EUV Lithography 2007
The high-speed cache memory acts as a buffer between main memory and the central processing unit (CPU). Cache design, a direct-mapped cache and a fully associative cache and its implementation can make or break the performance (cache size, associativity, line size, physical versus virtual, and degree of asynchrony) of a computer systems. Accordingly, a higher level of associativity is better with respect to caches and physically addressed caches are better for environments where context switching is very frequent. In designing or tuning a CPU intensive application, it is advisable to maximize locality and avoid memory-access sequences that increase by large powers of 2.
Donald Samuels, Ian Stobert
SPIE Photomask Technology + EUV Lithography 2007
B.K. Boguraev, Mary S. Neff
HICSS 2000
Xinyi Su, Guangyu He, et al.
Dianli Xitong Zidonghua/Automation of Electric Power Systems
J.P. Locquet, J. Perret, et al.
SPIE Optical Science, Engineering, and Instrumentation 1998