Computationally Efficient Yield Estimation Procedures Based on Simplicial Approximation

Several computationally efficient procedures for estimating the manufacturing yield of a given design are described. These methods employ a Monte Carlo analysis in the parameter space using a simplicial approximation to the region of acceptability and thereby avoid the usual multitude of circuit simulations. Thus these methods can provide significant savings over conventional Monte Carlo analysis, especially when used to determine digital integrated circuit yield in which a nonlinear and/or transient simulation can be quite costly. © 1978 IEEE.