Philip G. Emma, Eren Kursun
IBM J. Res. Dev
We present a new design in which two branch prediction mechanisms are used in conjunction. We show that the combination of these mechanisms will reduce branch penalty, while also reducing chip area. © 1992.
Philip G. Emma, Eren Kursun
IBM J. Res. Dev
Ben Lin, Michael B. Healy, et al.
MICRO 2018
Philip G. Emma
IEEE Micro
Charles F. Webb, Carl J. Anderson, et al.
IEEE Journal of Solid-State Circuits