Design Tradeoffs for Process Scheduling in Shared Memory Multiprocessor Systems

Abstract

A shared-memory multiprocessor has various inherent or potential hardware and software bottlenecks. The software bottleneck is mainly due to the synchronization of processes and the access of critical sections. The most frequently occurred software bottleneck, the monitor bottleneck, which is caused by the scheduling of large number of processors, is investigated. The monitor bottleneck is created due to the mutually exclusive access of the single scheduling monitor. Monitor bottleneck can be resolved using multiple monitors. However, multiple monitors may result in a low processor utilization due to load imbalancing. This paper studies the tradeoffs in designing an efficient process scheduling strategy. © 1989 IEEE