Enhanced Quality CVD-Grown Graphene via a Double-Plateau Copper Surface Planarization Methodology

Abstract

Two-dimensional (2D) nanomaterials have been of intense interest in recent years because of their exceptional electronic, thermal, and mechanical properties. Tailoring these novel properties toward their intrinsic potential requires precise control of the atomic layer growth process and the underlying catalytic growth substrate, as the morphology and purity of the catalytic surface plays a critical role on the shape, size, and growth kinetics of the 2D nanomaterial. In this work, we present a systematic study on the role of the catalytic surface morphology and interface properties on the subsequent carrier mobility properties of CVD-grown graphene. A modified electropolishing methodology results in a dramatic reduction of over 99% in Cu surface roughness that enhances the carrier mobility of the CVD-grown graphene by as much as 125% compared to unpolished and lower planarization level growth substrates, providing a clear correlation between the smoothness of the Cu growth substrate and the resulting electrical properties of the graphene. Mobility measurements also reveal a systematic and controllable reduction in carrier concentration for increased electropolishing time. In addition to enhanced transport properties, the 100-fold reduction in the copper surface roughness leads to the ability to grow high-quality graphene at lower process temperatures.