Single-chip 4×500Mbaud CMOS transceiver
A.X. Widmer, K. Wrenner, et al.
ISSCC 1996
It has been demonstrated that full-swing complementary MOS/bipolar logic (FS-CMBL) circuits utilizing a push-pull emitter-follower driver and base-emitter shunting to achieve full swing are potentially advantageous for scaled BiCMOS technologies. In these circuits, delay and power consumption depend on characteristics of the base-to-base clamping diode, parasitic capacitances at the two base nodes, and techniques used to achieve full swing. Variations of full-swing complementary circuits utilizing different clamping diodes and full-swing techniques, implemented in a fully-complementary BiCMOS technology, are presented. The FS-CMBL circuits demonstrate a clear advantage over the conventional npn-only, partial-swing BiCMOS circuit.
A.X. Widmer, K. Wrenner, et al.
ISSCC 1996
Hyun J. Shin, S.K. Reynolds, et al.
LPE 1994
F.S. Lai
VLSI Circuits 1990
Peter Xiao, D. Kuchta, et al.
ISSCC 1997