F.R. Gfeller
Journal of Physics D: Applied Physics
A 10:1 serializer/deserializer subsystem with fast byte synchronisation and link control functions has been designed. The subsystem, consisting of 1030 gates, was implemented on GaAs using a refractory-gate MESFET process and is part of an optoelectronic transmitter/receiver chip set for fibre-optic computer communication links. An operating speed of 1 Gbit/s was achieved with a power dissipation of only 1.2 W.
F.R. Gfeller
Journal of Physics D: Applied Physics
F.R. Gfeller
Applied Physics Letters
F.R. Gfeller, W. Hirt, et al.
VTC 1996
F.R. Gfeller, U. Bapst
Electronics Letters