Heuristic characterization of Si-photonic switches

Hannah R. Grant; George Papen; Shayan Mookherjea; Benjamin G. Lee; Laurent Schares

doi:10.1364/PS.2017.PTu3C.1

Advanced Photonics 2017

Conference paper

24 Jul 2017

Heuristic characterization of Si-photonic switches

View publication

Abstract

A heuristic parametric model for the system-level characterization of a siliconphotonics switch chip is presented. The model can be used to predict the system-level performance of a switch chip using a limited number of measurements.

Paper

A Dynamically-Reconfigurable Burst-Mode Link Using a Nanosecond Photonic Switch

Conference paper

System-level demonstration of a dynamically reconfigured burst-mode link using a nanosecond Si-photonic switch

Paper

Heuristic Model for Rapid Characterization of a SiP Switch Chip

Conference paper

Bit error rate measurements of a 4 × 4 Si-Photonic switch using synchronous and asynchronous data

View all publications

Abstract

Related

A Dynamically-Reconfigurable Burst-Mode Link Using a Nanosecond Photonic Switch

System-level demonstration of a dynamically reconfigured burst-mode link using a nanosecond Si-photonic switch

Heuristic Model for Rapid Characterization of a SiP Switch Chip

Bit error rate measurements of a 4 × 4 Si-Photonic switch using synchronous and asynchronous data