Allon Adir, Maxim Golubev, et al.
DAC 2011
The growing importance of post-silicon validation in ensuring functional correctness of high-end designs has increased the need for synergy between the pre-silicon verification and post-silicon validation. This synergy starts with a common verification plan. It continues with common verification goals and shared tools and techniques. This paper describes our experience in improving this synergy in the pre- and post-silicon verification of IBM's POWER7 processor chip and by leveraging pre-silicon methodologies and techniques in the post-silicon validation of the chip. © 2011 ACM.
Allon Adir, Maxim Golubev, et al.
DAC 2011
Erich P. Stuntebeck, John S. Davis II, et al.
HotMobile 2008
Pradip Bose
VTS 1998
Raymond Wu, Jie Lu
ITA Conference 2007