MICROPROCESSOR DESIGN USING THE YORKTOWN SILICON COMPILER.

Abstract

The process of transforming an architectural specification of a streamlined processor (the IBM 801) into a design specification suitable for input to a silicon compiler is described. Starting from that specification, the authors develop a description of combinational logic, latches and registers, hierarchically organized, which implement a pipelined version of the processing unit. This description is then automatically compiled down to the gate level in single ended cascode technology.