Conference paper
On-the-fly resolve trace minimization
Ohad Shacham, Karen Yorav
DAC 2007
The trend to multi-core chip designs presents new challenges for design automation, while the increased reuse of components may offer solutions. This paper describes some of the key challenges with attention paid to three enablers: a physical architecture to streamline chip integration, the linking of early analysis tools around shared data and an updated verification approach for multi-core designs. Copyright 2007 ACM.
Ohad Shacham, Karen Yorav
DAC 2007
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