Conference paper
Electrically-driven retargeting for nanoscale layouts
Shayak Banerjee, Kanak B. Agarwal, et al.
CICC 2011
Power grids for sub-micron large integrated circuits are performance limiting factors due to the large power dissipated (e.g. 100 W at 1.8 V). The analysis of such power grids is important in order to predict and possibly improve the performance. Current classical analysis methods are falling behind as grids become ever larger. This paper proposes a new efficient analysis method suitable for both DC and transient simulation of large power grids.
Shayak Banerjee, Kanak B. Agarwal, et al.
CICC 2011
Joseph N. Kozhaya, Sani R. Nassif, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wei Zhao, Frank Liu, et al.
IEEE Trans Semicond Manuf
Asen Asenov, Binjie Cheng, et al.
IEEE T-ED