Modeling polarization for Hyper-NA lithography tools and masks
Kafai Lai, Alan E. Rosenbluth, et al.
SPIE Advanced Lithography 2007
During the last half century, a dramatic downscaling of electronics has taken place, a miniaturization that the industry expects to continue for at least a decade. We present efforts to use the self-assembly of one-dimensional semiconductor nanowires1 in order to bring new, high-performance nanowire devices as an add-on to mainstream Si technology. The nanowire approach offers a coaxial gate-dielectric-channel geometry that is ideal for further downscaling and electrostatic control, as well as heterostructure-based devices on Si wafers. © 2006 Elsevier Ltd. All rights reserved.
Kafai Lai, Alan E. Rosenbluth, et al.
SPIE Advanced Lithography 2007
J.H. Stathis, R. Bolam, et al.
INFOS 2005
C.M. Brown, L. Cristofolini, et al.
Chemistry of Materials
Lawrence Suchow, Norman R. Stemple
JES