An architecture for near-data processing systems
Erik Vermij, Christoph Hagleitner, et al.
CF 2016
Processing-in-memory and near-memory computing have recently been rediscovered as a way to alleviate the "memory wall problem" of traditional computing architectures. In this paper, we discuss the implementation of a 3D-stacked near-memory accelerator, targeting radio astronomy and scientific applications. After exploring the design space of the architecture by focusing on minimizing the execution power of the processing pipeline of the SKA1-Low central signal processor, we show that our accelerator can achieve an energy efficiency of up to 390 GFLOPS/W, corresponding to an energy consumption one order of magnitude lower than alternative state-of-the-art implementations. When running additional mathematical and streaming-oriented kernels, our accelerator achieves from 6.4× to 20× energy efficiency improvement compared to alternative solutions.
Erik Vermij, Christoph Hagleitner, et al.
CF 2016
Giovanni Mariani, Andreea Anghel, et al.
Parallel Computing
Giovanni Mariani, Andreea Anghel, et al.
Int. J. Parallel Program
Andreea Anghel, Rik Jongerius, et al.
ICASSP 2014