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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Chaining is the ability to pipeline two or more vector instructions on Cray-1 like machines. We show how to optimally use this feature to compute (vector) expression trees in the context of automatic code generation. We present a linear time scheduling algorithm for finding an optimal order of evaluation for a machine with a bounded number of registers. © 1988 IEEE
Shmuel Wimer, Ron Y. Pinter, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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ACM SIGPLAN Notices
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