Optimized Test Application Timing for AC Test

AC testing of integrated circuits and assemblies is gaining importance as the trend continues in favor of fewer defects shipped and use of higher performance technologies. While there is a large body of literature on test generation and fault simulation related to ac test, the optimization of timing on the tester has been unexplored. This paper defines the problems associated with optimization of the test application timing for a class of test equipment. Two approaches to test application timing are introduced. The notion of slack is used to define the objective function for optimization. The optimization problem is shown to be NP-complete even for non-reconvergent fanout circuits. Heuristics are presented for the optimization problems and the results compared with bounds on test circuits. © 1992, IEEE