Performance of cell-to-cell interference mitigation in 1y-nm MLC flash memory

Abstract

A cell-to-cell interference (CCI) cancellation algorithm is evaluated using experimental data from a 1y-nm MLC flash memory device. The resulting endurance improvement is quantified for the different types of page within the flash block and an error analysis is performed. Various simplifications of the algorithm are considered to achieve low read latency without sacrificing error-rate reduction.