Shuang Chen, Herbert Freeman
International Journal of Pattern Recognition and Artificial Intelligence
This paper covers the recent developments of high speed, t 100Gb/s, VCSELs and VCSEL-based transceivers that are designed for co-packaging on a first level package with ASICs, such as CPUs, GPUs, and data center switches.
Shuang Chen, Herbert Freeman
International Journal of Pattern Recognition and Artificial Intelligence
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