Conference paper
A place and route aware buffered steiner tree construction
C.N. Sze, Jiang Hu, et al.
ASP-DAC 2004
Buffer insertion is essential for achieving timing closure. This work studies buffer insertion under two types of constraints: (i) avoiding blockages, and (ii) inserting buffers into pre-determined buffer bay regions. We propose a general Steiner tree routing problem to drive this application and present a maze-routing based heuristic. We show that this approach leads to useful solutions on industry designs.
C.N. Sze, Jiang Hu, et al.
ASP-DAC 2004
Shiyan Hu, Zhuo Li, et al.
ISPD 2009
Zhanyuan Jiang, Shiyan Hu, et al.
ICCAD 2006
Charles J. Alpert, Anirudh Devgan, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems