Yasunao Katayama, Yasushi Negishi, et al.
IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Despite their great market success, DRAMs have not kept pace with microprocessor improvements, so researchers are looking to advanced high-speed DRAM and merged DRAM/logic technologies to increase memory system performance.
Yasunao Katayama, Yasushi Negishi, et al.
IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Nobuyuki Ohba, Kohji Takano, et al.
CCNC 2012
Toshiyuki Yamane, Yasunao Katayama
GLOBECOM 2012
Yasunao Katayama, Toshiyuki Yamane, et al.
NANO 2015