Conference paper
A new look at logic synthesis
John A. Darringer, William H. Joyner
DAC 1980
Paper
Verification of HDLC
Abstract
A version of the standard high level data link control protocol has been verified as an experiment with an automated verification system. This paper tries to answer questions such as: How can HDLC and its properties be represented? To what extent can they be proved? What are the main obstacles in verifying protocols like HDLC. Copyright © 1982 by The Institute of Electrical and Electronics Engineers, Inc.
Related
Daniel Brand, Reinaldo A. Bergamaschi, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Alexander Birman, William H. Joyner
IEEE TSE
Conference paper
Flexible pointer analysis using Assign-Fetch Graphs
Marcio Buss, Daniel Brand, et al.
SAC 2008