VLIWSIM. An interactive simulator for VLIW architectures

Abstract

An interactive function simulator, VLIWSIM, is built for VLIW (Very Long Instruction Word) architectures. The simulator is designed to simulate a proposed architecture, verify compiler codes, and generate trace files. Small hand-coded programs were used to test the simulator and the results, especially the simulator's speed, are encouraging. Simple examples are presented in this paper to illustrate the fine-grain VLIW approach, while compiled codes are not currently available. Observation on utilization of instruction bits for branch evaluation is given to point out the importance of simulator flexibility for architecture updates in the early stage of an architecture design.