David A. Selby
IBM J. Res. Dev
We consider the problem of implementing a wait-free regular register from storage components prone to Byzantine faults. We present a simple, efficient, and self-contained construction of such a register. Our construction utilizes a novel building block, called a 1-regular register, which can be efficiently implemented from Byzantine fault-prone components. © 2006 Elsevier B.V. All rights reserved.
David A. Selby
IBM J. Res. Dev
S.F. Fan, W.B. Yun, et al.
Proceedings of SPIE 1989
Joel L. Wolf, Mark S. Squillante, et al.
IEEE Transactions on Knowledge and Data Engineering
Matthias Kaiserswerth
IEEE/ACM Transactions on Networking