A quantitative analysis of OS noise
Alessandro Morari, Roberto Gioiosa, et al.
IPDPS 2011
Inteirconnecction of components in a VLSI chip is becoming an increasingly complex problem. In this paper we examine the complexity of the wire routing process and discuss several new approaches to solving the problem using a parallel system architecture. The ma-chines discussed range from compact systems for highly specialized applications to more general designs suited for broader applications. The process speedup due to parallelism and the cost advantage due to the use of large numbers of identical VLSI parts make these new machines practical today. Copyright © 1983 by The Institute of Electrical and Electronics Engineers, Inc.
Alessandro Morari, Roberto Gioiosa, et al.
IPDPS 2011
Donald Samuels, Ian Stobert
SPIE Photomask Technology + EUV Lithography 2007
Israel Cidon, Leonidas Georgiadis, et al.
IEEE/ACM Transactions on Networking
Qing Li, Zhigang Deng, et al.
IEEE T-MI