Energy Efficient Cache Design with Piezoelectric FETsReena ElangovanAshish Ranjanet al.2022ISLPED 2022
Double-Gate MOSFETs with aymmetric drain underlap: A device-circuit co-design and optimization perspective for SRAMAshish GoelSumeet Guptaet al.2009DRC 2009
Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory SupportSandeep Krishna ThirumalaYi Tse Hunget al.2020IEEE TNANO