Stochastic weight updates in phase-change memory-based synapses and their influence on artificial neural networks
- 2017
- PRIME 2017
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44 results for Yusuf Leblebici
Neuromorphic system with phase-change synapses for pattern learning and feature extraction
- Stanislaw Wozniak
- Angeliki Pantazi
- et al.
- 2017
- IJCNN 2017
A 64Gb/s 1.4pJ/b NRZ optical-receiver data-path in 14nm CMOS FinFET
- Alessandro Cevrero
- Ilter Ozkaya
- et al.
- 2017
- ISSCC 2017
Neuromorphic computing using non-volatile memory
- Geoffrey W. Burr
- Robert M. Shelby
- et al.
- 2016
- Advances in Physics: X
Large-scale neural networks implemented with Non-Volatile Memory as the synaptic weight element: Impact of conductance response
- S. Sidler
- Irem Boybat
- et al.
- 2016
- ESSDERC 2016
Implementation of Low-Power 6-8 b 30-90 GS/s Time-Interleaved ADCs With Optimized Input Bandwidth in 32 nm CMOS
- Lukas Kull
- J. Pliva
- et al.
- 2016
- IEEE JSSC
Review of advances in neural networks: Neural design technology stack
- Adela-Diana Almási
- Stanislaw Wozniak
- et al.
- 2016
- Neurocomputing
A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS
- Alessandro Cevrero
- Cosimo Aprile
- et al.
- 2015
- VLSI Circuits 2015
Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Comparative performance analysis (accuracy, speed, and power)
- Geoffrey W. Burr
- Pritish Narayanan
- et al.
- 2015
- IEDM 2015
A 110 mW 6 bit 36 GS/s interleaved SAR ADC for 100 GBE occupying 0.048 mm2 in 32 nm SOI CMOS
- Lukas Kull
- J. Pliva
- et al.
- 2014
- A-SSCC 2014