Novel high-density data-retention power gating structure using a four-terminal double-gate device
- Keunwoo Kim
- Koushik K. Das
- et al.
- 2007
- VLSI-DAT 2007
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136 results for C.T. Chuang
Power-gating schemes for Ultra-Thin SOI (UTSOI) circuits in hybrid SOI-epitaxial CMOS structures
- Shih-Hsien Lo
- Koushik K. Das
- et al.
- 2007
- VLSI-DAT 2007
Asymmetrical triple-gate FET
- Meng-Hsueh Chiang
- Jeng-Nan Lin
- et al.
- 2007
- SISPAD 2007
An asymmetrical double-gate VCO with wide frequency range
- Hung Ngo
- Keunwoo Kim
- et al.
- 2006
- VLSI-TSA 2006
Discrete dopant fluctuation in limited-width FinFETs for VLSI circuit application: A theoretical study
- Meng-Hsueh Chiang
- Jeng-Nan Lin
- et al.
- 2006
- ICICDT 2006
Optimal design of nanoscale triple-gate devices
- Meng-Hsueh Chiang
- Tze-Neng Lin
- et al.
- 2006
- IEEE SOI 2006
Back-gate controlled wide tunable range diode voltage in asymmetrical double-gate devices
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2006
- IEEE SOI 2006
Double-gate FET technology for RF applications: Device characteristics and low noise amplifier design
- Karan Bhatia
- Keunwoo Kim
- et al.
- 2006
- IEEE SOI 2006
Statistical exploration of the dual supply voltage space of a 65nm PD/SOI CMOS SRAM cell
- Rajiv Joshi
- Rouwaida Kanj
- et al.
- 2006
- ESSDERC 2006
3-D thermal modeling of FinFET
- R.V. Joshi
- José A. Pascual-Gutiérrez
- et al.
- 2005
- ESSDERC 2005