Processor Verification Using Efficient Reductions of the Logic of Uninterpreted Functions to Propositional Logic
- Randal E. Bryant
- Steven German
- et al.
- 2001
- ACM TOCL
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4 results for Randal E. Bryant
Exploiting symmetry when verifying transistor-level circuits by symbolic trajectory evaluation
- Manish Pandey
- Randal E. Bryant
- 1999
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Intractability in Linear Switch-Level Simulation
- Lawrence P. Huang
- Randal E. Bryant
- 1993
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Massively Parallel Switch-Level Simulation: A Feasibility Study
- Saul A. Kravitz
- Randal E. Bryant
- et al.
- 1991
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems