Publications

9 results for W. Natzle

High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
- - M. Chudzik
  - B. Doris
  - et al.
- 2007
- VLSI Technology 2007
Effect of tensile uniaxial stress on the electron transport properties of deeply scaled FD-SOI n-type MOSFETs
- - H. Nayfeh
  - D. Singh
  - et al.
- 2006
- IEEE Electron Device Letters
Systematic study of workfunction engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks
- - Y.-H. Kim
  - C. Cabral Jr.
  - et al.
- 2005
- IEDM 2005
Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths
- - D. Singh
  - J. Sleight
  - et al.
- 2005
- IEDM 2005
Trimming of hard-masks by gaseous chemical oxide removal (COR) for sub-10nm gates/fins, for gate length control and for embedded logic
- - Wesley C. Natzle
  - David Horak
  - et al.
- 2004
- ASMC 2004
A Simplified Hybrid Orientation Technology (SHOT) for high performance CMOS
- - B. Doris
  - Y. Zhang
  - et al.
- 2004
- VLSI Technology 2004
Device Design Considerations for Ultra-Thin SOI MOSFETs
- - B. Doris
  - M. Ieong
  - et al.
- 2003
- IEDM 2003
Extreme scaling with ultra-thin Si channel MOSFETs
- - Bruce Doris
  - Meikei Ieong
  - et al.
- 2002
- IEDM 2002
70 nm damascene-gate MOSFETs with minimal polysilicon gate-depletion
- - Hussein I. Hanafi
  - Russell Arndt
  - et al.
- 2001
- ESSDERC 2001