High conductivity gate metallurgy for TFT/LCD's
- P.M. Fryer
- E.G. Colgan
- et al.
- 1998
- MRS Spring Meeting 1998
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24 results for Raymond Horton
High conductivity gate metallurgy for TFT/LCD's
- P.M. Fryer
- E.G. Colgan
- et al.
- 1998
- MRS Spring Meeting 1998
Terabus: Chip-to-chip board-level optical data buses
- J.A. Kash
- F.E. Doany
- et al.
- 2008
- LEOS 2008
300-Gb/s, 24-channel full-duplex, 850-nm, cmos-based optical transceivers
- C.L. Schow
- F.E. Doany
- et al.
- 2008
- OFC/NFOEC 2008
Silicon carrier with deep through-vias, fine pitch wiring, and through cavity for parallel optical transceiver
- Chirag S. Patel
- Cornelia K. Tsang
- et al.
- 2005
- ADMETA 2005
Characterization of flip chip microjoins up to 40 GHz using silicon carrier
- Chirag S. Patel
- Paul S. Andry
- et al.
- 2005
- IITC 2005
Three dimensional silicon integration using fine pitch interconnection, silicon processing and silicon carrier packaging technology
- John U. Knickerbocker
- Chirag S. Patel
- et al.
- 2005
- CICC 2005
3D chip-stacking technology with through-silicon vias and low-volume lead free interconnections
- Katsuyuki Sakuma
- Paul S. Andry
- et al.
- 2008
- IBM J. Res. Dev
Three-dimensional silicon integration
- John U. Knickerbocker
- Paul S. Andry
- et al.
- 2008
- IBM J. Res. Dev
3D chip stacking with C4 technology
- Bing Dang
- Steven L. Wright
- et al.
- 2008
- IBM J. Res. Dev