Product burn-in stress impacts on SRAM array performance
- Li Wang
- Qiuyi Ye
- et al.
- 2007
- IRPS 2007
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High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
- E. Leobandung
- H. Nayakama
- et al.
- 2005
- VLSI Technology 2005