A novel low resistance gate fill for extreme gate length scaling at 20nm and beyond for gate-last high-k/metal gate CMOS technology
- U. Kwon
- K. Wong
- et al.
- 2012
- VLSI Technology 2012
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A 90nm dual damascene hybrid (organic / inorganic) low-k - Copper BEOL integration scheme
- T. Dalton
- A. Cowley
- et al.
- 2003
- ADMETA 2003