Publications

2 results for Frank D. Ferraiolo

A 5.4mW 0.0035mm² 0.48ps_rms-jitter 0.8-to-5GHz non-PLL/DLL all-digital phase generator/rotator in 45nm SOI CMOS
- - Kyu-Hyoun Kim
  - Daniel M. Dreps
  - et al.
- 2009
- ISSCC 2009
A Clock Methodology for High-Performance Microprocessors
- - Keith M. Carrig
  - Albert M. Chu
  - et al.
- 1997
- Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology