A 5.2GHz microprocessor chip for the IBM zEnterprise™ system
- James Warnock
- Y.-H. Chan
- et al.
- 2011
- ISSCC 2011
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9 results for William Huott
Non-invasive timing analysis of IBM G6 microprocessor L1 cache using backside time-resolved hot electron luminescence
- S. Polonsky
- D.R. Knebel
- et al.
- 2000
- ISSCC 2000
Case Study of Advanced Diagnostic Techniques for Multi Port Register File
- Uma Srinivasan
- William Huott
- et al.
- 2019
- NATW 2019
On-chip timing uncertainty measurements on IBM microprocessors
- R.L. Franch
- P. Restle
- et al.
- 2008
- IEEE ITC 2008
A low power and high performance SOI SRAM circuit design with improved cell stability
- R.V. Joshi
- Y. Chan
- et al.
- 2006
- IEEE SOI 2006
2 GHz cycle, 430 ps access time 34 Kb L1 directory SRAM in 1.5 V, 0.18 μm CMOS bulk technology
- R.V. Joshi
- S.P. Kowalczyk
- et al.
- 2000
- VLSI Circuits 2000
15 Kb 1.5 ns Access on-chip tag SRAM
- P.F. Lu
- S.P. Kowalcyzk
- et al.
- 1997
- VLSI-TSA 1997
PICA: Backside failure analysis of CMOS circuits using picosecond imaging circuit analysis
- M. McManus
- J.A. Kash
- et al.
- 2000
- Microelectronics Reliability
A 400-MHz S/390 microprocessor
- Charles F. Webb
- Carl J. Anderson
- et al.
- 1997
- IEEE Journal of Solid-State Circuits