The design and implementation of a first-generation CELL Processor
- D.C. Pham
- S. Asano
- et al.
- 2005
- ISSCC 2005
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38 results for Peter Hofstee
The design and implementation of a first-generation CELL processor
- D.C. Pham
- S. Asano
- et al.
- 2005
- ISSCC 2005
The design methodology and implementation of a first-generation CELL processor: A multi-core SoC
- D.C. Pham
- E. Behnen
- et al.
- 2005
- CICC 2005
The design and implementation of a first-generation CELL processor - A multi-core SoC
- D.C. Pham
- S. Asano
- et al.
- 2005
- ICICDT 2005
Introduction to the cell multiprocessor
- James A. Kahle
- Michael N. Day
- et al.
- 2005
- IBM J. Res. Dev
High-speed, power-conscious circuit design techniques for high-performance computing
- O. Takahashi
- S. Dhong
- et al.
- 2001
- VLSI-TSA 2001
Derivation of a rotator circuit with homogeneous interconnect
- H. Peter Hofstee
- Jun Sawada
- 2001
- Information Processing Letters
A 1GHz single-issue 64b powerPC processor
- H.P. Hofstee
- Naoaki Aoki
- et al.
- 2000
- ISSCC 2000
'Timing Closure by Design,' a high frequency microprocessor design methodology
- S.D. Posluszny
- Naoaki Aoki
- et al.
- 2000
- DAC 2000
Custom circuit design as a driver of microprocessor performance
- David H. Allen
- Sang H. Dhong
- et al.
- 2000
- IBM J. Res. Dev