Lowerature wafer bonding for three-dimensional wafer-scale integration
- Zhe Wan
- Kevin Winstel
- et al.
- 2018
- S3S 2018
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7 results for Kevin Winstel
Advanced Arsenic Doped Epitaxial Growth for Source Drain Extension Formation in Scaled FinFET Devices
- Shogo Mochizuki
- B. Colombeau
- et al.
- 2018
- IEDM 2018
Essential edge protection techniques for successful multi-wafer stacking
- Joshua Rubin
- Kevin Winstel
- et al.
- 2015
- S3S 2015
Bonding technologies for chip level and wafer level 3D integration
- Katsuyuki Sakuma
- Spyridon Skordas
- et al.
- 2014
- ECTC 2014
Copper-to-dielectric heterogeneous bonding for 3D integration
- Wei Lin
- Juntao Li
- et al.
- 2014
- LTB-3D 2014
3D copper TSV integration, testing and reliability
- Mukta Farooq
- T. Graves-Abe
- et al.
- 2011
- IEDM 2011
A 0.127 μm2 high performance 65 nm SOI based embedded DRAM for on-processor applications
- G. Wang
- K. Cheng
- et al.
- 2006
- IEDM 2006