Challenges in FEOL logic device integration for 32 nm technology node and beyond
- Dae-Gyu Park
- M. Chudzik
- et al.
- 2007
- ECS Meeting 2007
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45 results for M. Chudzik
A comparative study of NBTI and PBTI (Charge Trapping) in SiO 2/HfO2 stacks with FUSI, TiN, Re gates
- S. Zafar
- Y.-H. Kim
- et al.
- 2006
- VLSI Technology 2006
Band-edge high-performance high-κ /metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyond
- V. Narayanan
- V.K. Paruchuri
- et al.
- 2006
- VLSI Technology 2006
Charge defects, Vt shifts, and the solution to the high-k metal gate n-MOSFET problem
- Supratik Guha
- Vijay Narayanan
- et al.
- 2006
- Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2006
A comparison of electrical and physical properties of MOCVD hafnium silicate thin films deposited using various silicon precursors
- P. Jamison
- M. Copel
- et al.
- 2006
- MRS Spring Meeting 2006
Synthesis and control of ultra thin gate oxides for the 90 and 65 NM nodes
- Joseph F. Shepard Jr.
- Anthony Chou
- et al.
- 2005
- RTP 2005
Charge trapping in aggressively scaled metal gate/high-κ stacks
- E. Gusev
- V. Narayanan
- et al.
- 2004
- IEDM 2004
Thermally robust dual-work function ALD-MN x MOSFETs using conventional CMOS process flow
- D.-G. Park
- Z. Luo
- et al.
- 2004
- VLSI Technology 2004
Systematic study of pFET Vt with Hf-based gate stacks with poly-Si and FUSI gates
- E. Cartier
- V. Narayanan
- et al.
- 2004
- VLSI Technology 2004
Surface potential and morphology issues of annealed (HfO 2) x(SiO 2) 1-x gate oxides
- R. Ludeke
- P. Lysaght
- et al.
- 2004
- Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures