A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons
- Jae-Sun Seo
- Bernard Brezzo
- et al.
- 2011
- CICC 2011
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Crosstalk-aware PWM-based on-chip links with self-calibration in 65 nm CMOS
- Jae-Sun Seo
- David Blaauw
- et al.
- 2011
- IEEE JSSC