'Timing Closure by Design,' a high frequency microprocessor design methodology
- S.D. Posluszny
- Naoaki Aoki
- et al.
- 2000
- DAC 2000
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A 1GHz single-issue 64b powerPC processor
- H.P. Hofstee
- Naoaki Aoki
- et al.
- 2000
- ISSCC 2000