Architecture and design of a pseudo two-port VLSI snoopy cache memorySharon C. ChuangAnni Bruss1990COMPEURO 1990
An on-chip 72K pseudo two-port cache memory subsystemSharon C. ChuangTamal Mukherjeeet al.1990VLSI Circuits 1990
DESIGN METHODOLOGY FOR EVALUATING DESIGN TRADE-OFFS IN A MICROPROCESSOR SYSTEM.Sharon C. ChuangR.E. Maticket al.1983ICCD 1983