IBM POWER9 circuit design and energy optimization for 14-nm technology
- Eric J. Fluhr
- R.M. Rao
- et al.
- 2018
- IBM J. Res. Dev
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38 results for R.M. Rao
IBM POWER8 circuit design and energy optimization
- Victor Zyuban
- Joshua Friedrich
- et al.
- 2015
- IBM J. Res. Dev
Slew-rate monitoring circuit for on-chip process variation detection
- Amlan Ghosh
- Rahul M. Rao
- et al.
- 2013
- IEEE Transactions on VLSI Systems
Power optimization methodology for the IBM POWER7 microprocessor
- Victor V. Zyuban
- Joshua Friedrich
- et al.
- 2011
- IBM J. Res. Dev
SRAM write-ability improvement with transient negative bit-line voltage
- Saibal Mukhopadhyay
- Rahul M. Rao
- et al.
- 2011
- IEEE Transactions on VLSI Systems
A local random variability detector with complete digital on-chip measurement circuitry
- Rahul Rao
- Keith A. Jenkins
- et al.
- 2009
- IEEE Journal of Solid-State Circuits
Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probability
- Aditya Bansal
- Rahul Rao
- et al.
- 2009
- Microelectronics Reliability
Parametric yield analysis and optimization in leakage dominated technologies
- Kanak Agarwal
- Rahul Rao
- et al.
- 2007
- IEEE Transactions on VLSI Systems