Making reliable memories in an unreliable world (invited)
- Rajiv Joshi
- Rouwaida Kanj
- et al.
- 2013
- IRPS 2013
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131 results for J. Warnock
5.5GHz system z microprocessor and multi-chip module
- James Warnock
- Yuen H Chan
- et al.
- 2013
- ISSCC 2013
Circuit and PD challenges at the 14nm technology node
- James Warnock
- 2013
- ISPD 2013
Circuit design challenges at the 14nm technology node
- James Warnock
- 2011
- DAC 2011
A 5.2GHz microprocessor chip for the IBM zEnterprise™ system
- James Warnock
- Y.-H. Chan
- et al.
- 2011
- ISSCC 2011
POWER7™, a highly parallel, scalable multi-core high end server processor
- Dieter F. Wendel
- Ron Kalla
- et al.
- 2011
- IEEE Journal of Solid-State Circuits
POWER7™ local clocking and clocked storage elements
- James Warnock
- Leon Sigal
- et al.
- 2010
- ISSCC 2010
An elegant hardware-corroborated statistical repair and test methodology for conquering aging effects
- Rouwaida Kanj
- Rajiv Joshi
- et al.
- 2009
- ICCAD 2009
Cell broadband engine processor: Design and implementation
- Mack W. Riley
- James D. Warnock
- et al.
- 2007
- IBM J. Res. Dev
Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor
- Dac Pham
- Hans-Werner Anderson
- et al.
- 2006
- ASP-DAC 2006