Lateral InAs/Si p-Type Tunnel FETs Integrated on Si - Part 1: Experimental Devices
- Kirsten E. Moselund
- D. Cutaia
- et al.
- 2016
- IEEE T-ED
Publications
Date
Featured collections
Popular topics
15 results for D. Cutaia
Lateral InAs/Si p-Type Tunnel FETs Integrated on Si - Part 2: Simulation Study of the Impact of Interface Traps
- Saurabh Sant
- Kirsten E. Moselund
- et al.
- 2016
- IEEE T-ED
Template-assisted selective epitaxy of III-V nanoscale devices for co-planar heterogeneous integration with Si
- Heinz Schmid
- Mattias Borg
- et al.
- 2015
- Applied Physics Letters
Vertical InAs-Si gate-all-around tunnel FETs integrated on Si using selective epitaxy in nanotube templates
- D. Cutaia
- Kirsten E. Moselund
- et al.
- 2015
- IEEE J-EDS
Mechanisms of template-assisted selective epitaxy of InAs nanowires on Si
- Mattias Borg
- Heinz Schmid
- et al.
- 2015
- Journal of Applied Physics