A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS
- Jean-Olivier Plouchart
- Mark A. Ferriss
- et al.
- 2012
- CICC 2012
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156 results for Alexander V. Rylyakov
250 Gbps 10-channel WDM silicon photonics receiver
- Huapu Pan
- Solomon Assefa
- et al.
- 2012
- GFP 2012
A 21.8-27.5GHz PLL in 32nm SOI using G m linearization to achieve -130dBc/Hz phase noise at 10MHz offset from a 22GHz carrier
- Bodhisatwa Sadhu
- Mark A. Ferriss
- et al.
- 2012
- RFIC 2012
An integral path self-calibration scheme for a 20.1-26.7GHz dual-loop PLL in 32nm SOI CMOS
- Mark Ferriss
- Jean-Olivier Plouchart
- et al.
- 2012
- VLSI Circuits 2012
Terabit/sec VCSEL-based parallel optical module based on holey CMOS transceiver IC
- Fuad E. Doany
- Benjamin G. Lee
- et al.
- 2012
- OFC/NFOEC 2012
40Gbps optical receiver based on Germanium waveguide photodetector hybrid-integrated with 90nm CMOS amplifier
- Huapu Pan
- Solomon Assefa
- et al.
- 2012
- CLEO 2012
A 40-Gb/s, 850-nm, VCSEL-Based full optical link
- Alexander V. Rylyakov
- Clint L. Schow
- et al.
- 2012
- OFC 2012
Terabit/sec VCSEL-based parallel optical module based on holey CMOS transceiver IC
- Fuad E. Doany
- Benjamin G. Lee
- et al.
- 2012
- OFC 2012
Ultra low power 10- to 25-Gb/s CMOS-driven VCSEL links
- Jonathan E. Proesel
- Clint L. Schow
- et al.
- 2012
- OFC/NFOEC 2012
CMOS integrated nanophotonics for future computing systems
- Solomon Assefa
- William M. J. Green
- et al.
- 2011
- BCTM 2011