Pushing ASIC performance in a power envelope
- Ruchir Puri
- Leon Stok
- et al.
- 2003
- DAC 2003
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27 results for David Z. Pan
Multilevel global placement with congestion control
- Chin-Chih Chang
- Jason Cong
- et al.
- 2003
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wire width planning for interconnect performance optimization
- Jason Cong
- Zhigang Pan
- 2002
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Buffer block planning for interconnect planning and prediction
- Jason Cong
- Tianming Kong
- et al.
- 2001
- IEEE Transactions on VLSI Systems
Interconnect sizing and spacing with consideration of coupling capacitance
- Jason Cong
- Lei He
- et al.
- 2001
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Interconnect performance estimation models for design planning
- Jason Cong
- Zhigang Pan
- 2001
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Improved crosstalk modeling for noise constrained interconnect optimization
- J. Gong
- D.Z. Pan
- et al.
- 2001
- ASP-DAC 2001