Statistical analysis and optimization in the presence of gate and interconnect delay variations
- Chandu Visweswariah
- 2006
- SLIP 2006
Publications
Date
Featured collections
Popular topics
58 results for Chandu Visweswariah
Gate sizing using incremental parameterized statistical timing analysis
- M.R. Guthaus
- N. Venkateswarant
- et al.
- 2005
- ICCAD 2005
Large-scale nonlinear optimization in circuit tuning
- Andreas Wächter
- Chandu Visweswariah
- et al.
- 2005
- Future Generation Computer Systems
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
- Hongliang Chang
- Vladimir Zolotov
- et al.
- 2005
- DAC 2005
The impact of variability on design methodology
- Chandu Visweswariah
- 2005
- ICICDT 2005
Statistical analysis and design: From picoseconds to probabilities
- Chandu Visweswariah
- 2004
- SBCCI 2004
First-order incremental block-based statistical timing analysis
- Chandramouli Visweswariah
- K. Ravindran
- et al.
- 2004
- DAC 2004
Time budgeting in a wireplanning context
- Jurjen Westra
- Dirk-Jan Jongeneel
- et al.
- 2003
- DATE 2003
Statistical timing for parametric yield prediction of digital integrated circuits
- J.A.G. Jess
- K. Kalafala
- et al.
- 2003
- DAC 2003
Death, taxes and failing chips
- Chandu Visweswariah
- 2003
- DAC 2003